1. Field of the Invention
Embodiments of the present invention generally relate to the field of semiconductor manufacturing processes and devices, and more particularly, to methods of surface treatment of semiconductor substrates prior to layer deposition.
2. Description of the Related Art
Semiconductor devices, such as microprocessors and memory chips, are manufactured by creating multiple layers of various materials on the top surface of a semiconductor substrate (for example, a silicon substrate). As an illustrative example, during the fabrication of CMOS (complementary metal oxide semiconductor) devices, a dielectric layer may be grown atop a silicon substrate to form an insulating layer between the gate electrode and the source/drain/channel region of the device.
If the surface of the substrate has contaminants, or defects, the devices manufactured thereupon may be defective (e.g., the devices may have reduced performance, improper performance, may be inoperative, or the like). Contamination of the substrate surface is a major cause of reduced process yields in device manufacturing. Therefore, it is desirable to keep the surfaces of the substrate free of any contaminants or defects.
Contaminants can come from various sources. Prior processing steps, such as plasma etching, wet chemical etching, or the like, can leave contaminants such as oxygen, carbon, water, various hydrocarbons, and the like on the surface of the substrate. Moreover, these processes can also damage the surface of the substrate thereby further causing defects.
Typically, contaminants and defects on the surface of the substrate may be removed by a high temperature hydrogen bake at temperatures greater than 700 degrees Celsius during a pre-deposition cleaning and surface treatment process of a processed bulk silicon-containing substrate. However, such high-temperature processing of the substrate undesirably leads to diffusion of materials between boundaries of structures formed on the substrate (such as, for example, dopants, introduced into the substrate prior to layer deposition, adjacent disparate materials, and the like). Moreover, as the size of devices continues to shrink, such diffusion problems become increasingly troublesome due to the reduced feature sizes.
Therefore, there is a need for improved techniques for removing contaminants and/or healing defects while limiting material diffusion.